
imu9250:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400680 <_init>:
  400680:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400684:	910003fd 	mov	x29, sp
  400688:	94000050 	bl	4007c8 <call_weak_fn>
  40068c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400690:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006a0 <.plt>:
  4006a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006a4:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xfff0>
  4006a8:	f947fe11 	ldr	x17, [x16, #4088]
  4006ac:	913fe210 	add	x16, x16, #0xff8
  4006b0:	d61f0220 	br	x17
  4006b4:	d503201f 	nop
  4006b8:	d503201f 	nop
  4006bc:	d503201f 	nop

00000000004006c0 <exit@plt>:
  4006c0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006c4:	f9400211 	ldr	x17, [x16]
  4006c8:	91000210 	add	x16, x16, #0x0
  4006cc:	d61f0220 	br	x17

00000000004006d0 <perror@plt>:
  4006d0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006d4:	f9400611 	ldr	x17, [x16, #8]
  4006d8:	91002210 	add	x16, x16, #0x8
  4006dc:	d61f0220 	br	x17

00000000004006e0 <malloc@plt>:
  4006e0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006e4:	f9400a11 	ldr	x17, [x16, #16]
  4006e8:	91004210 	add	x16, x16, #0x10
  4006ec:	d61f0220 	br	x17

00000000004006f0 <open@plt>:
  4006f0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006f4:	f9400e11 	ldr	x17, [x16, #24]
  4006f8:	91006210 	add	x16, x16, #0x18
  4006fc:	d61f0220 	br	x17

0000000000400700 <__libc_start_main@plt>:
  400700:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400704:	f9401211 	ldr	x17, [x16, #32]
  400708:	91008210 	add	x16, x16, #0x20
  40070c:	d61f0220 	br	x17

0000000000400710 <close@plt>:
  400710:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400714:	f9401611 	ldr	x17, [x16, #40]
  400718:	9100a210 	add	x16, x16, #0x28
  40071c:	d61f0220 	br	x17

0000000000400720 <__gmon_start__@plt>:
  400720:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400724:	f9401a11 	ldr	x17, [x16, #48]
  400728:	9100c210 	add	x16, x16, #0x30
  40072c:	d61f0220 	br	x17

0000000000400730 <abort@plt>:
  400730:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400734:	f9401e11 	ldr	x17, [x16, #56]
  400738:	9100e210 	add	x16, x16, #0x38
  40073c:	d61f0220 	br	x17

0000000000400740 <puts@plt>:
  400740:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400744:	f9402211 	ldr	x17, [x16, #64]
  400748:	91010210 	add	x16, x16, #0x40
  40074c:	d61f0220 	br	x17

0000000000400750 <free@plt>:
  400750:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400754:	f9402611 	ldr	x17, [x16, #72]
  400758:	91012210 	add	x16, x16, #0x48
  40075c:	d61f0220 	br	x17

0000000000400760 <printf@plt>:
  400760:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400764:	f9402a11 	ldr	x17, [x16, #80]
  400768:	91014210 	add	x16, x16, #0x50
  40076c:	d61f0220 	br	x17

0000000000400770 <ioctl@plt>:
  400770:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400774:	f9402e11 	ldr	x17, [x16, #88]
  400778:	91016210 	add	x16, x16, #0x58
  40077c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400780 <_start>:
  400780:	d280001d 	mov	x29, #0x0                   	// #0
  400784:	d280001e 	mov	x30, #0x0                   	// #0
  400788:	aa0003e5 	mov	x5, x0
  40078c:	f94003e1 	ldr	x1, [sp]
  400790:	910023e2 	add	x2, sp, #0x8
  400794:	910003e6 	mov	x6, sp
  400798:	580000c0 	ldr	x0, 4007b0 <_start+0x30>
  40079c:	580000e3 	ldr	x3, 4007b8 <_start+0x38>
  4007a0:	58000104 	ldr	x4, 4007c0 <_start+0x40>
  4007a4:	97ffffd7 	bl	400700 <__libc_start_main@plt>
  4007a8:	97ffffe2 	bl	400730 <abort@plt>
  4007ac:	00000000 	.inst	0x00000000 ; undefined
  4007b0:	00400d10 	.word	0x00400d10
  4007b4:	00000000 	.word	0x00000000
  4007b8:	00400e80 	.word	0x00400e80
  4007bc:	00000000 	.word	0x00000000
  4007c0:	00400f00 	.word	0x00400f00
  4007c4:	00000000 	.word	0x00000000

00000000004007c8 <call_weak_fn>:
  4007c8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xfff0>
  4007cc:	f947f000 	ldr	x0, [x0, #4064]
  4007d0:	b4000040 	cbz	x0, 4007d8 <call_weak_fn+0x10>
  4007d4:	17ffffd3 	b	400720 <__gmon_start__@plt>
  4007d8:	d65f03c0 	ret
  4007dc:	00000000 	.inst	0x00000000 ; undefined

00000000004007e0 <deregister_tm_clones>:
  4007e0:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  4007e4:	9101c000 	add	x0, x0, #0x70
  4007e8:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  4007ec:	9101c021 	add	x1, x1, #0x70
  4007f0:	eb00003f 	cmp	x1, x0
  4007f4:	540000a0 	b.eq	400808 <deregister_tm_clones+0x28>  // b.none
  4007f8:	90000001 	adrp	x1, 400000 <_init-0x680>
  4007fc:	f9479021 	ldr	x1, [x1, #3872]
  400800:	b4000041 	cbz	x1, 400808 <deregister_tm_clones+0x28>
  400804:	d61f0020 	br	x1
  400808:	d65f03c0 	ret
  40080c:	d503201f 	nop

0000000000400810 <register_tm_clones>:
  400810:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  400814:	9101c000 	add	x0, x0, #0x70
  400818:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  40081c:	9101c021 	add	x1, x1, #0x70
  400820:	cb000021 	sub	x1, x1, x0
  400824:	9343fc21 	asr	x1, x1, #3
  400828:	8b41fc21 	add	x1, x1, x1, lsr #63
  40082c:	9341fc21 	asr	x1, x1, #1
  400830:	b40000a1 	cbz	x1, 400844 <register_tm_clones+0x34>
  400834:	90000002 	adrp	x2, 400000 <_init-0x680>
  400838:	f9479442 	ldr	x2, [x2, #3880]
  40083c:	b4000042 	cbz	x2, 400844 <register_tm_clones+0x34>
  400840:	d61f0040 	br	x2
  400844:	d65f03c0 	ret

0000000000400848 <__do_global_dtors_aux>:
  400848:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40084c:	910003fd 	mov	x29, sp
  400850:	f9000bf3 	str	x19, [sp, #16]
  400854:	d0000093 	adrp	x19, 412000 <exit@GLIBC_2.17>
  400858:	3941c260 	ldrb	w0, [x19, #112]
  40085c:	35000080 	cbnz	w0, 40086c <__do_global_dtors_aux+0x24>
  400860:	97ffffe0 	bl	4007e0 <deregister_tm_clones>
  400864:	52800020 	mov	w0, #0x1                   	// #1
  400868:	3901c260 	strb	w0, [x19, #112]
  40086c:	f9400bf3 	ldr	x19, [sp, #16]
  400870:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400874:	d65f03c0 	ret

0000000000400878 <frame_dummy>:
  400878:	17ffffe6 	b	400810 <register_tm_clones>

000000000040087c <open_i2c>:
  40087c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400880:	910003fd 	mov	x29, sp
  400884:	90000000 	adrp	x0, 400000 <_init-0x680>
  400888:	913cc000 	add	x0, x0, #0xf30
  40088c:	52800041 	mov	w1, #0x2                   	// #2
  400890:	97ffff98 	bl	4006f0 <open@plt>
  400894:	b9001fa0 	str	w0, [x29, #28]
  400898:	b9401fa0 	ldr	w0, [x29, #28]
  40089c:	7100001f 	cmp	w0, #0x0
  4008a0:	540000ca 	b.ge	4008b8 <open_i2c+0x3c>  // b.tcont
  4008a4:	90000000 	adrp	x0, 400000 <_init-0x680>
  4008a8:	913d0000 	add	x0, x0, #0xf40
  4008ac:	97ffff89 	bl	4006d0 <perror@plt>
  4008b0:	52800020 	mov	w0, #0x1                   	// #1
  4008b4:	97ffff83 	bl	4006c0 <exit@plt>
  4008b8:	b9401fa0 	ldr	w0, [x29, #28]
  4008bc:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008c0:	d65f03c0 	ret

00000000004008c4 <close_i2c>:
  4008c4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008c8:	910003fd 	mov	x29, sp
  4008cc:	b9001fa0 	str	w0, [x29, #28]
  4008d0:	b9401fa0 	ldr	w0, [x29, #28]
  4008d4:	97ffff8f 	bl	400710 <close@plt>
  4008d8:	d503201f 	nop
  4008dc:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008e0:	d65f03c0 	ret

00000000004008e4 <hd_i2c_set>:
  4008e4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008e8:	910003fd 	mov	x29, sp
  4008ec:	b9001fa0 	str	w0, [x29, #28]
  4008f0:	b9001ba1 	str	w1, [x29, #24]
  4008f4:	b90017a2 	str	w2, [x29, #20]
  4008f8:	b9401fa0 	ldr	w0, [x29, #28]
  4008fc:	7100001f 	cmp	w0, #0x0
  400900:	54000061 	b.ne	40090c <hd_i2c_set+0x28>  // b.any
  400904:	12800000 	mov	w0, #0xffffffff            	// #-1
  400908:	1400001e 	b	400980 <hd_i2c_set+0x9c>
  40090c:	b9401ba0 	ldr	w0, [x29, #24]
  400910:	7100001f 	cmp	w0, #0x0
  400914:	54000060 	b.eq	400920 <hd_i2c_set+0x3c>  // b.none
  400918:	b9401ba0 	ldr	w0, [x29, #24]
  40091c:	14000002 	b	400924 <hd_i2c_set+0x40>
  400920:	52800020 	mov	w0, #0x1                   	// #1
  400924:	2a0003e2 	mov	w2, w0
  400928:	d280e041 	mov	x1, #0x702                 	// #1794
  40092c:	b9401fa0 	ldr	w0, [x29, #28]
  400930:	97ffff90 	bl	400770 <ioctl@plt>
  400934:	7100001f 	cmp	w0, #0x0
  400938:	5400006a 	b.ge	400944 <hd_i2c_set+0x60>  // b.tcont
  40093c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400940:	14000010 	b	400980 <hd_i2c_set+0x9c>
  400944:	b94017a0 	ldr	w0, [x29, #20]
  400948:	7100001f 	cmp	w0, #0x0
  40094c:	54000060 	b.eq	400958 <hd_i2c_set+0x74>  // b.none
  400950:	b94017a0 	ldr	w0, [x29, #20]
  400954:	14000002 	b	40095c <hd_i2c_set+0x78>
  400958:	52800060 	mov	w0, #0x3                   	// #3
  40095c:	2a0003e2 	mov	w2, w0
  400960:	d280e021 	mov	x1, #0x701                 	// #1793
  400964:	b9401fa0 	ldr	w0, [x29, #28]
  400968:	97ffff82 	bl	400770 <ioctl@plt>
  40096c:	7100001f 	cmp	w0, #0x0
  400970:	5400006a 	b.ge	40097c <hd_i2c_set+0x98>  // b.tcont
  400974:	12800000 	mov	w0, #0xffffffff            	// #-1
  400978:	14000002 	b	400980 <hd_i2c_set+0x9c>
  40097c:	52800000 	mov	w0, #0x0                   	// #0
  400980:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400984:	d65f03c0 	ret

0000000000400988 <read_i2c>:
  400988:	a9bb7bfd 	stp	x29, x30, [sp, #-80]!
  40098c:	910003fd 	mov	x29, sp
  400990:	f9000bf3 	str	x19, [sp, #16]
  400994:	b9002fa0 	str	w0, [x29, #44]
  400998:	b9002ba1 	str	w1, [x29, #40]
  40099c:	b90027a2 	str	w2, [x29, #36]
  4009a0:	12800000 	mov	w0, #0xffffffff            	// #-1
  4009a4:	b9004fa0 	str	w0, [x29, #76]
  4009a8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4009ac:	b9004ba0 	str	w0, [x29, #72]
  4009b0:	52800040 	mov	w0, #0x2                   	// #2
  4009b4:	b90043a0 	str	w0, [x29, #64]
  4009b8:	b94043a0 	ldr	w0, [x29, #64]
  4009bc:	2a0003e0 	mov	w0, w0
  4009c0:	d37cec00 	lsl	x0, x0, #4
  4009c4:	97ffff47 	bl	4006e0 <malloc@plt>
  4009c8:	f9001fa0 	str	x0, [x29, #56]
  4009cc:	f9401fa0 	ldr	x0, [x29, #56]
  4009d0:	f100001f 	cmp	x0, #0x0
  4009d4:	54000141 	b.ne	4009fc <read_i2c+0x74>  // b.any
  4009d8:	90000000 	adrp	x0, 400000 <_init-0x680>
  4009dc:	913d6000 	add	x0, x0, #0xf58
  4009e0:	97ffff58 	bl	400740 <puts@plt>
  4009e4:	f9401fa0 	ldr	x0, [x29, #56]
  4009e8:	97ffff5a 	bl	400750 <free@plt>
  4009ec:	b9402fa0 	ldr	w0, [x29, #44]
  4009f0:	97ffff48 	bl	400710 <close@plt>
  4009f4:	12800000 	mov	w0, #0xffffffff            	// #-1
  4009f8:	14000049 	b	400b1c <read_i2c+0x194>
  4009fc:	52800040 	mov	w0, #0x2                   	// #2
  400a00:	b90043a0 	str	w0, [x29, #64]
  400a04:	f9401fa0 	ldr	x0, [x29, #56]
  400a08:	52800021 	mov	w1, #0x1                   	// #1
  400a0c:	79000801 	strh	w1, [x0, #4]
  400a10:	f9401fa0 	ldr	x0, [x29, #56]
  400a14:	b9402ba1 	ldr	w1, [x29, #40]
  400a18:	12003c21 	and	w1, w1, #0xffff
  400a1c:	79000001 	strh	w1, [x0]
  400a20:	f9401fa0 	ldr	x0, [x29, #56]
  400a24:	7900041f 	strh	wzr, [x0, #2]
  400a28:	f9401fb3 	ldr	x19, [x29, #56]
  400a2c:	d2800020 	mov	x0, #0x1                   	// #1
  400a30:	97ffff2c 	bl	4006e0 <malloc@plt>
  400a34:	f9000660 	str	x0, [x19, #8]
  400a38:	f9401fa0 	ldr	x0, [x29, #56]
  400a3c:	f9400400 	ldr	x0, [x0, #8]
  400a40:	b94027a1 	ldr	w1, [x29, #36]
  400a44:	12001c21 	and	w1, w1, #0xff
  400a48:	39000001 	strb	w1, [x0]
  400a4c:	f9401fa0 	ldr	x0, [x29, #56]
  400a50:	91004000 	add	x0, x0, #0x10
  400a54:	52800021 	mov	w1, #0x1                   	// #1
  400a58:	79000801 	strh	w1, [x0, #4]
  400a5c:	f9401fa0 	ldr	x0, [x29, #56]
  400a60:	91004000 	add	x0, x0, #0x10
  400a64:	b9402ba1 	ldr	w1, [x29, #40]
  400a68:	12003c21 	and	w1, w1, #0xffff
  400a6c:	79000001 	strh	w1, [x0]
  400a70:	f9401fa0 	ldr	x0, [x29, #56]
  400a74:	91004000 	add	x0, x0, #0x10
  400a78:	52800021 	mov	w1, #0x1                   	// #1
  400a7c:	79000401 	strh	w1, [x0, #2]
  400a80:	f9401fa0 	ldr	x0, [x29, #56]
  400a84:	91004013 	add	x19, x0, #0x10
  400a88:	d2800020 	mov	x0, #0x1                   	// #1
  400a8c:	97ffff15 	bl	4006e0 <malloc@plt>
  400a90:	f9000660 	str	x0, [x19, #8]
  400a94:	f9401fa0 	ldr	x0, [x29, #56]
  400a98:	91004000 	add	x0, x0, #0x10
  400a9c:	f9400400 	ldr	x0, [x0, #8]
  400aa0:	3900001f 	strb	wzr, [x0]
  400aa4:	9100e3a0 	add	x0, x29, #0x38
  400aa8:	aa0003e2 	mov	x2, x0
  400aac:	d280e0e1 	mov	x1, #0x707                 	// #1799
  400ab0:	b9402fa0 	ldr	w0, [x29, #44]
  400ab4:	97ffff2f 	bl	400770 <ioctl@plt>
  400ab8:	b9004ba0 	str	w0, [x29, #72]
  400abc:	b9404ba0 	ldr	w0, [x29, #72]
  400ac0:	7100001f 	cmp	w0, #0x0
  400ac4:	5400016a 	b.ge	400af0 <read_i2c+0x168>  // b.tcont
  400ac8:	90000000 	adrp	x0, 400000 <_init-0x680>
  400acc:	913dc000 	add	x0, x0, #0xf70
  400ad0:	97ffff1c 	bl	400740 <puts@plt>
  400ad4:	f9401fa0 	ldr	x0, [x29, #56]
  400ad8:	f9400400 	ldr	x0, [x0, #8]
  400adc:	97ffff1d 	bl	400750 <free@plt>
  400ae0:	f9401fa0 	ldr	x0, [x29, #56]
  400ae4:	97ffff1b 	bl	400750 <free@plt>
  400ae8:	12800000 	mov	w0, #0xffffffff            	// #-1
  400aec:	1400000c 	b	400b1c <read_i2c+0x194>
  400af0:	f9401fa0 	ldr	x0, [x29, #56]
  400af4:	91004000 	add	x0, x0, #0x10
  400af8:	f9400400 	ldr	x0, [x0, #8]
  400afc:	39400000 	ldrb	w0, [x0]
  400b00:	b9004fa0 	str	w0, [x29, #76]
  400b04:	f9401fa0 	ldr	x0, [x29, #56]
  400b08:	f9400400 	ldr	x0, [x0, #8]
  400b0c:	97ffff11 	bl	400750 <free@plt>
  400b10:	f9401fa0 	ldr	x0, [x29, #56]
  400b14:	97ffff0f 	bl	400750 <free@plt>
  400b18:	b9404fa0 	ldr	w0, [x29, #76]
  400b1c:	f9400bf3 	ldr	x19, [sp, #16]
  400b20:	a8c57bfd 	ldp	x29, x30, [sp], #80
  400b24:	d65f03c0 	ret

0000000000400b28 <read_i2c_block_frequency>:
  400b28:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b2c:	910003fd 	mov	x29, sp
  400b30:	b9002fa0 	str	w0, [x29, #44]
  400b34:	b9002ba1 	str	w1, [x29, #40]
  400b38:	b90027a2 	str	w2, [x29, #36]
  400b3c:	b90023a3 	str	w3, [x29, #32]
  400b40:	f9000fa4 	str	x4, [x29, #24]
  400b44:	b9003fbf 	str	wzr, [x29, #60]
  400b48:	14000011 	b	400b8c <read_i2c_block_frequency+0x64>
  400b4c:	b94027a1 	ldr	w1, [x29, #36]
  400b50:	b9403fa0 	ldr	w0, [x29, #60]
  400b54:	0b000020 	add	w0, w1, w0
  400b58:	2a0003e2 	mov	w2, w0
  400b5c:	b9402ba1 	ldr	w1, [x29, #40]
  400b60:	b9402fa0 	ldr	w0, [x29, #44]
  400b64:	97ffff89 	bl	400988 <read_i2c>
  400b68:	2a0003e2 	mov	w2, w0
  400b6c:	b9803fa0 	ldrsw	x0, [x29, #60]
  400b70:	f9400fa1 	ldr	x1, [x29, #24]
  400b74:	8b000020 	add	x0, x1, x0
  400b78:	12001c41 	and	w1, w2, #0xff
  400b7c:	39000001 	strb	w1, [x0]
  400b80:	b9403fa0 	ldr	w0, [x29, #60]
  400b84:	11000400 	add	w0, w0, #0x1
  400b88:	b9003fa0 	str	w0, [x29, #60]
  400b8c:	b9403fa1 	ldr	w1, [x29, #60]
  400b90:	b94023a0 	ldr	w0, [x29, #32]
  400b94:	6b00003f 	cmp	w1, w0
  400b98:	54fffdab 	b.lt	400b4c <read_i2c_block_frequency+0x24>  // b.tstop
  400b9c:	52800000 	mov	w0, #0x0                   	// #0
  400ba0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ba4:	d65f03c0 	ret

0000000000400ba8 <write_i2c>:
  400ba8:	a9bb7bfd 	stp	x29, x30, [sp, #-80]!
  400bac:	910003fd 	mov	x29, sp
  400bb0:	f9000bf3 	str	x19, [sp, #16]
  400bb4:	b9002fa0 	str	w0, [x29, #44]
  400bb8:	b9002ba1 	str	w1, [x29, #40]
  400bbc:	b90027a2 	str	w2, [x29, #36]
  400bc0:	b90023a3 	str	w3, [x29, #32]
  400bc4:	12800000 	mov	w0, #0xffffffff            	// #-1
  400bc8:	b9004fa0 	str	w0, [x29, #76]
  400bcc:	52800040 	mov	w0, #0x2                   	// #2
  400bd0:	b90043a0 	str	w0, [x29, #64]
  400bd4:	b94043a0 	ldr	w0, [x29, #64]
  400bd8:	2a0003e0 	mov	w0, w0
  400bdc:	d37cec00 	lsl	x0, x0, #4
  400be0:	97fffec0 	bl	4006e0 <malloc@plt>
  400be4:	f9001fa0 	str	x0, [x29, #56]
  400be8:	f9401fa0 	ldr	x0, [x29, #56]
  400bec:	f100001f 	cmp	x0, #0x0
  400bf0:	54000141 	b.ne	400c18 <write_i2c+0x70>  // b.any
  400bf4:	90000000 	adrp	x0, 400000 <_init-0x680>
  400bf8:	913d6000 	add	x0, x0, #0xf58
  400bfc:	97fffed1 	bl	400740 <puts@plt>
  400c00:	b9402fa0 	ldr	w0, [x29, #44]
  400c04:	97fffec3 	bl	400710 <close@plt>
  400c08:	f9401fa0 	ldr	x0, [x29, #56]
  400c0c:	97fffed1 	bl	400750 <free@plt>
  400c10:	12800000 	mov	w0, #0xffffffff            	// #-1
  400c14:	1400003c 	b	400d04 <write_i2c+0x15c>
  400c18:	52800042 	mov	w2, #0x2                   	// #2
  400c1c:	d280e041 	mov	x1, #0x702                 	// #1794
  400c20:	b9402fa0 	ldr	w0, [x29, #44]
  400c24:	97fffed3 	bl	400770 <ioctl@plt>
  400c28:	52800022 	mov	w2, #0x1                   	// #1
  400c2c:	d280e021 	mov	x1, #0x701                 	// #1793
  400c30:	b9402fa0 	ldr	w0, [x29, #44]
  400c34:	97fffecf 	bl	400770 <ioctl@plt>
  400c38:	52800020 	mov	w0, #0x1                   	// #1
  400c3c:	b90043a0 	str	w0, [x29, #64]
  400c40:	f9401fa0 	ldr	x0, [x29, #56]
  400c44:	52800041 	mov	w1, #0x2                   	// #2
  400c48:	79000801 	strh	w1, [x0, #4]
  400c4c:	f9401fa0 	ldr	x0, [x29, #56]
  400c50:	b9402ba1 	ldr	w1, [x29, #40]
  400c54:	12003c21 	and	w1, w1, #0xffff
  400c58:	79000001 	strh	w1, [x0]
  400c5c:	f9401fa0 	ldr	x0, [x29, #56]
  400c60:	7900041f 	strh	wzr, [x0, #2]
  400c64:	f9401fb3 	ldr	x19, [x29, #56]
  400c68:	d2800040 	mov	x0, #0x2                   	// #2
  400c6c:	97fffe9d 	bl	4006e0 <malloc@plt>
  400c70:	f9000660 	str	x0, [x19, #8]
  400c74:	f9401fa0 	ldr	x0, [x29, #56]
  400c78:	f9400400 	ldr	x0, [x0, #8]
  400c7c:	b94027a1 	ldr	w1, [x29, #36]
  400c80:	12001c21 	and	w1, w1, #0xff
  400c84:	39000001 	strb	w1, [x0]
  400c88:	f9401fa0 	ldr	x0, [x29, #56]
  400c8c:	f9400400 	ldr	x0, [x0, #8]
  400c90:	91000400 	add	x0, x0, #0x1
  400c94:	b94023a1 	ldr	w1, [x29, #32]
  400c98:	12001c21 	and	w1, w1, #0xff
  400c9c:	39000001 	strb	w1, [x0]
  400ca0:	9100e3a0 	add	x0, x29, #0x38
  400ca4:	aa0003e2 	mov	x2, x0
  400ca8:	d280e0e1 	mov	x1, #0x707                 	// #1799
  400cac:	b9402fa0 	ldr	w0, [x29, #44]
  400cb0:	97fffeb0 	bl	400770 <ioctl@plt>
  400cb4:	b9004fa0 	str	w0, [x29, #76]
  400cb8:	b9404fa0 	ldr	w0, [x29, #76]
  400cbc:	7100001f 	cmp	w0, #0x0
  400cc0:	5400016a 	b.ge	400cec <write_i2c+0x144>  // b.tcont
  400cc4:	90000000 	adrp	x0, 400000 <_init-0x680>
  400cc8:	913e2000 	add	x0, x0, #0xf88
  400ccc:	97fffe9d 	bl	400740 <puts@plt>
  400cd0:	f9401fa0 	ldr	x0, [x29, #56]
  400cd4:	f9400400 	ldr	x0, [x0, #8]
  400cd8:	97fffe9e 	bl	400750 <free@plt>
  400cdc:	f9401fa0 	ldr	x0, [x29, #56]
  400ce0:	97fffe9c 	bl	400750 <free@plt>
  400ce4:	12800000 	mov	w0, #0xffffffff            	// #-1
  400ce8:	14000007 	b	400d04 <write_i2c+0x15c>
  400cec:	f9401fa0 	ldr	x0, [x29, #56]
  400cf0:	f9400400 	ldr	x0, [x0, #8]
  400cf4:	97fffe97 	bl	400750 <free@plt>
  400cf8:	f9401fa0 	ldr	x0, [x29, #56]
  400cfc:	97fffe95 	bl	400750 <free@plt>
  400d00:	52800000 	mov	w0, #0x0                   	// #0
  400d04:	f9400bf3 	ldr	x19, [sp, #16]
  400d08:	a8c57bfd 	ldp	x29, x30, [sp], #80
  400d0c:	d65f03c0 	ret

0000000000400d10 <main>:
  400d10:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400d14:	910003fd 	mov	x29, sp
  400d18:	39007fbf 	strb	wzr, [x29, #31]
  400d1c:	790023bf 	strh	wzr, [x29, #16]
  400d20:	39004bbf 	strb	wzr, [x29, #18]
  400d24:	97fffed6 	bl	40087c <open_i2c>
  400d28:	b9001ba0 	str	w0, [x29, #24]
  400d2c:	52800042 	mov	w2, #0x2                   	// #2
  400d30:	52800041 	mov	w1, #0x2                   	// #2
  400d34:	b9401ba0 	ldr	w0, [x29, #24]
  400d38:	97fffeeb 	bl	4008e4 <hd_i2c_set>
  400d3c:	52800002 	mov	w2, #0x0                   	// #0
  400d40:	d280e081 	mov	x1, #0x704                 	// #1796
  400d44:	b9401ba0 	ldr	w0, [x29, #24]
  400d48:	97fffe8a 	bl	400770 <ioctl@plt>
  400d4c:	7100001f 	cmp	w0, #0x0
  400d50:	540000c0 	b.eq	400d68 <main+0x58>  // b.none
  400d54:	90000000 	adrp	x0, 400000 <_init-0x680>
  400d58:	913e8000 	add	x0, x0, #0xfa0
  400d5c:	97fffe5d 	bl	4006d0 <perror@plt>
  400d60:	12800000 	mov	w0, #0xffffffff            	// #-1
  400d64:	14000045 	b	400e78 <main+0x168>
  400d68:	52800d02 	mov	w2, #0x68                  	// #104
  400d6c:	d280e061 	mov	x1, #0x703                 	// #1795
  400d70:	b9401ba0 	ldr	w0, [x29, #24]
  400d74:	97fffe7f 	bl	400770 <ioctl@plt>
  400d78:	7100001f 	cmp	w0, #0x0
  400d7c:	540000c0 	b.eq	400d94 <main+0x84>  // b.none
  400d80:	90000000 	adrp	x0, 400000 <_init-0x680>
  400d84:	913f0000 	add	x0, x0, #0xfc0
  400d88:	97fffe52 	bl	4006d0 <perror@plt>
  400d8c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400d90:	1400003a 	b	400e78 <main+0x168>
  400d94:	52800ea2 	mov	w2, #0x75                  	// #117
  400d98:	52800d01 	mov	w1, #0x68                  	// #104
  400d9c:	b9401ba0 	ldr	w0, [x29, #24]
  400da0:	97fffefa 	bl	400988 <read_i2c>
  400da4:	39007fa0 	strb	w0, [x29, #31]
  400da8:	39407fa1 	ldrb	w1, [x29, #31]
  400dac:	90000000 	adrp	x0, 400000 <_init-0x680>
  400db0:	913f8000 	add	x0, x0, #0xfe0
  400db4:	97fffe6b 	bl	400760 <printf@plt>
  400db8:	910043a0 	add	x0, x29, #0x10
  400dbc:	aa0003e4 	mov	x4, x0
  400dc0:	52800063 	mov	w3, #0x3                   	// #3
  400dc4:	52800002 	mov	w2, #0x0                   	// #0
  400dc8:	52800d01 	mov	w1, #0x68                  	// #104
  400dcc:	b9401ba0 	ldr	w0, [x29, #24]
  400dd0:	97ffff56 	bl	400b28 <read_i2c_block_frequency>
  400dd4:	394043a0 	ldrb	w0, [x29, #16]
  400dd8:	2a0003e1 	mov	w1, w0
  400ddc:	394047a0 	ldrb	w0, [x29, #17]
  400de0:	2a0003e2 	mov	w2, w0
  400de4:	39404ba0 	ldrb	w0, [x29, #18]
  400de8:	2a0003e3 	mov	w3, w0
  400dec:	90000000 	adrp	x0, 400000 <_init-0x680>
  400df0:	913fc000 	add	x0, x0, #0xff0
  400df4:	97fffe5b 	bl	400760 <printf@plt>
  400df8:	52801dc3 	mov	w3, #0xee                  	// #238
  400dfc:	52800002 	mov	w2, #0x0                   	// #0
  400e00:	52800d01 	mov	w1, #0x68                  	// #104
  400e04:	b9401ba0 	ldr	w0, [x29, #24]
  400e08:	97ffff68 	bl	400ba8 <write_i2c>
  400e0c:	52801ba3 	mov	w3, #0xdd                  	// #221
  400e10:	52800022 	mov	w2, #0x1                   	// #1
  400e14:	52800d01 	mov	w1, #0x68                  	// #104
  400e18:	b9401ba0 	ldr	w0, [x29, #24]
  400e1c:	97ffff63 	bl	400ba8 <write_i2c>
  400e20:	52801543 	mov	w3, #0xaa                  	// #170
  400e24:	52800042 	mov	w2, #0x2                   	// #2
  400e28:	52800d01 	mov	w1, #0x68                  	// #104
  400e2c:	b9401ba0 	ldr	w0, [x29, #24]
  400e30:	97ffff5e 	bl	400ba8 <write_i2c>
  400e34:	910043a0 	add	x0, x29, #0x10
  400e38:	aa0003e4 	mov	x4, x0
  400e3c:	52800063 	mov	w3, #0x3                   	// #3
  400e40:	52800002 	mov	w2, #0x0                   	// #0
  400e44:	52800d01 	mov	w1, #0x68                  	// #104
  400e48:	b9401ba0 	ldr	w0, [x29, #24]
  400e4c:	97ffff37 	bl	400b28 <read_i2c_block_frequency>
  400e50:	394043a0 	ldrb	w0, [x29, #16]
  400e54:	2a0003e1 	mov	w1, w0
  400e58:	394047a0 	ldrb	w0, [x29, #17]
  400e5c:	2a0003e2 	mov	w2, w0
  400e60:	39404ba0 	ldrb	w0, [x29, #18]
  400e64:	2a0003e3 	mov	w3, w0
  400e68:	90000000 	adrp	x0, 400000 <_init-0x680>
  400e6c:	913fc000 	add	x0, x0, #0xff0
  400e70:	97fffe3c 	bl	400760 <printf@plt>
  400e74:	52800000 	mov	w0, #0x0                   	// #0
  400e78:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400e7c:	d65f03c0 	ret

0000000000400e80 <__libc_csu_init>:
  400e80:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400e84:	910003fd 	mov	x29, sp
  400e88:	a901d7f4 	stp	x20, x21, [sp, #24]
  400e8c:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0xfff0>
  400e90:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0xfff0>
  400e94:	91374294 	add	x20, x20, #0xdd0
  400e98:	913722b5 	add	x21, x21, #0xdc8
  400e9c:	a902dff6 	stp	x22, x23, [sp, #40]
  400ea0:	cb150294 	sub	x20, x20, x21
  400ea4:	f9001ff8 	str	x24, [sp, #56]
  400ea8:	2a0003f6 	mov	w22, w0
  400eac:	aa0103f7 	mov	x23, x1
  400eb0:	9343fe94 	asr	x20, x20, #3
  400eb4:	aa0203f8 	mov	x24, x2
  400eb8:	97fffdf2 	bl	400680 <_init>
  400ebc:	b4000194 	cbz	x20, 400eec <__libc_csu_init+0x6c>
  400ec0:	f9000bb3 	str	x19, [x29, #16]
  400ec4:	d2800013 	mov	x19, #0x0                   	// #0
  400ec8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400ecc:	aa1803e2 	mov	x2, x24
  400ed0:	aa1703e1 	mov	x1, x23
  400ed4:	2a1603e0 	mov	w0, w22
  400ed8:	91000673 	add	x19, x19, #0x1
  400edc:	d63f0060 	blr	x3
  400ee0:	eb13029f 	cmp	x20, x19
  400ee4:	54ffff21 	b.ne	400ec8 <__libc_csu_init+0x48>  // b.any
  400ee8:	f9400bb3 	ldr	x19, [x29, #16]
  400eec:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400ef0:	a942dff6 	ldp	x22, x23, [sp, #40]
  400ef4:	f9401ff8 	ldr	x24, [sp, #56]
  400ef8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400efc:	d65f03c0 	ret

0000000000400f00 <__libc_csu_fini>:
  400f00:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400f04 <_fini>:
  400f04:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400f08:	910003fd 	mov	x29, sp
  400f0c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400f10:	d65f03c0 	ret
